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# amd186.h

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    00001 #ifndef  AMD186_HPP
    00002 #define  AMD186_HPP
    00003
    00004 // needed for the inpw/outpw inlines
    00005 //
    00006 #include <conio.h>
    00007
    00008 // peripheral control block registers
    00009 //
    00010 #define  PCB_BASE         0xff00              /* Peripheral control block base address */
    00011
    00012 #define  PCB_RELREG       (PCB_BASE + 0xFE)   /* Peripheral control block relocation register */
    00013 #define  PCB_RESCON       (PCB_BASE + 0xF6)   /* Reset configuration register */
    00014 #define  PCB_PRL          (PCB_BASE + 0xF4)   /* Processor release level register */
    00015 #define  PCB_AUXCON       (PCB_BASE + 0xF2)   /* Auxiliary configuration */
    00016 #define  PCB_SYSCON       (PCB_BASE + 0xF0)   /* System configuration register */
    00017 #define  PCB_WDT          (PCB_BASE + 0xE6)   /* Watchdog timer control register */
    00018 #define  PCB_EDRAM        (PCB_BASE + 0xE4)   /* Enable RCU register */
    00019 #define  PCB_CDRAM        (PCB_BASE + 0xE2)   /* Clock prescalar register */
    00020 #define  PCB_D1CON        (PCB_BASE + 0xDA)   /* DMA 1 control register */
    00021 #define  PCB_D1TC         (PCB_BASE + 0xD8)   /* DMA 1 transfer count register */
    00022 #define  PCB_D1DSTH       (PCB_BASE + 0xD6)   /* DMA 1 destination address high register */
    00023 #define  PCB_D1DSTL       (PCB_BASE + 0xD4)   /* DMA 1 destination address low register */
    00024 #define  PCB_D1SRCH       (PCB_BASE + 0xD2)   /* DMA 1 source address high register */
    00025 #define  PCB_D1SRCL       (PCB_BASE + 0xD0)   /* DMA 1 source address low register */
    00026 #define  PCB_D0CON        (PCB_BASE + 0xCA)   /* DMA 0 control register */
    00027 #define  PCB_D0TC         (PCB_BASE + 0xC8)   /* DMA 0 transfer count register */
    00028 #define  PCB_D0DSTH       (PCB_BASE + 0xC6)   /* DMA 0 destination address high register */
    00029 #define  PCB_D0DSTL       (PCB_BASE + 0xC4)   /* DMA 0 destination address low register */
    00030 #define  PCB_D0SRCH       (PCB_BASE + 0xC2)   /* DMA 0 source address high register */
    00031 #define  PCB_D0SRCL       (PCB_BASE + 0xC0)   /* DMA 0 source address low register */
    00032 #define  PCB_MPCS         (PCB_BASE + 0xA8)   /* PCS and MCS auxiliary register */
    00033 #define  PCB_MMCS         (PCB_BASE + 0xA6)   /* Midrange memory chip select register */
    00034 #define  PCB_PACS         (PCB_BASE + 0xA4)   /* Peripheral chip select register */
    00035 #define  PCB_LMCS         (PCB_BASE + 0xA2)   /* Low memory chip select register */
    00036 #define  PCB_UMCS         (PCB_BASE + 0xA0)   /* Upper memory chip select register */
    00037 #define  PCB_SP0BAUD      (PCB_BASE + 0x88)   /* Serial port 0 baud rate divisor register */
    00038 #define  PCB_SP0RD        (PCB_BASE + 0x86)   /* Serial port 0 receive data register */
    00039 #define  PCB_SP0TD        (PCB_BASE + 0x84)   /* Serial port 0 transmit data register */
    00040 #define  PCB_SP0STS       (PCB_BASE + 0x82)   /* Serial port 0 status register */
    00041 #define  PCB_SP0CT        (PCB_BASE + 0x80)   /* Serial port 0 control register */
    00042 #define  PCB_PDATA1       (PCB_BASE + 0x7A)   /* PIO data 1 register */
    00043 #define  PCB_PDIR1        (PCB_BASE + 0x78)   /* PIO direction 1 register */
    00044 #define  PCB_PIOMODE1     (PCB_BASE + 0x76)   /* PIO mode 1 register */
    00045 #define  PCB_PDATA0       (PCB_BASE + 0x74)   /* PIO data 0 register */
    00046 #define  PCB_PDIR0        (PCB_BASE + 0x72)   /* PIO direction 0 register */
    00047 #define  PCB_PIOMODE0     (PCB_BASE + 0x70)   /* PIO mode 0 register */
    00048 #define  PCB_T2CON        (PCB_BASE + 0x66)   /* Timer 2 mode/control register */
    00049 #define  PCB_T2CMPA       (PCB_BASE + 0x62)   /* Timer 2 maxcount compare A register */
    00050 #define  PCB_T2CNT        (PCB_BASE + 0x60)   /* Timer 2 count register */
    00051 #define  PCB_T1CON        (PCB_BASE + 0x5E)   /* Timer 1 mode/control register */
    00052 #define  PCB_T1CMPB       (PCB_BASE + 0x5C)   /* Timer 1 maxcount compare B register */
    00053 #define  PCB_T1CMPA       (PCB_BASE + 0x5A)   /* Timer 1 maxcount compare A register */
    00054 #define  PCB_T1CNT        (PCB_BASE + 0x58)   /* Timer 1 count register */
    00055 #define  PCB_T0CON        (PCB_BASE + 0x56)   /* Timer 0 mode/control register */
    00056 #define  PCB_T0CMPB       (PCB_BASE + 0x54)   /* Timer 0 maxcount compare B register */
    00057 #define  PCB_T0CMPA       (PCB_BASE + 0x52)   /* Timer 0 maxcount compare A register */
    00058 #define  PCB_T0CNT        (PCB_BASE + 0x50)   /* Timer 0 count register */
    00059 #define  PCB_SP0CON       (PCB_BASE + 0x44)   /* Serial port 0 interrupt control register Master mode */
    00060 #define  PCB_SP1CON       (PCB_BASE + 0x42)   /* Serial port 1 interrupt control register Master mode */
    00061 #define  PCB_INT4CON      (PCB_BASE + 0x40)   /* INT4 control register Master mode */
    00062 #define  PCB_INT3CON      (PCB_BASE + 0x3E)   /* INT3 control register Master mode */
    00063 #define  PCB_INT2CON      (PCB_BASE + 0x3C)   /* INT2 control register Master mode */
    00064 #define  PCB_INT1CON      (PCB_BASE + 0x3A)   /* INT1 control register Master mode */
    00065 #define  PCB_T2INTCON     (PCB_BASE + 0x3A)   /* Timer 2 interrupt control register Slave mode */
    00066 #define  PCB_INT0CON      (PCB_BASE + 0x38)   /* INT0 control register Master mode */
    00067 #define  PCB_T1INTCON     (PCB_BASE + 0x38)   /* Timer 1 interrupt control register Slave mode */
    00068 #define  PCB_DMA1CON      (PCB_BASE + 0x36)   /* DMA 1 interrupt control register */
    00069 #define  PCB_INT6CON      (PCB_BASE + 0x36)   /* INT6 Slave & master */
    00070 #define  PCB_DMA0CON      (PCB_BASE + 0x34)   /* DMA 0 interrupt control register */
    00071 #define  PCB_INT5CON      (PCB_BASE + 0x34)   /* INT5 Slave & master */
    00072 #define  PCB_TCUCON       (PCB_BASE + 0x32)   /* Timer interrupt control register Master mode */
    00073 #define  PCB_T0INTCON     (PCB_BASE + 0x32)   /* Timer 0 interrupt control register Slave mode */
    00074 #define  PCB_INTSTS       (PCB_BASE + 0x30)   /* Interrupt status register Slave & master */
    00075 #define  PCB_REQST        (PCB_BASE + 0x2E)   /* Interrupt request register Slave & master */
    00076 #define  PCB_INSERV       (PCB_BASE + 0x2C)   /* In-service register Slave & master */
    00077 #define  PCB_PRIMSK       (PCB_BASE + 0x2A)   /* Priority mask register Slave & master */
    00078 #define  PCB_IMASK        (PCB_BASE + 0x28)   /* Interrupt mask register Slave & master */
    00079 #define  PCB_POLLST       (PCB_BASE + 0x26)   /* Poll status register Master mode */
    00080 #define  PCB_POLL         (PCB_BASE + 0x24)   /* Poll register Master mode */
    00081 #define  PCB_EOI          (PCB_BASE + 0x22)   /* End-of-interrupt register Master mode  */
    00082 #define  PCB_INTVEC       (PCB_BASE + 0x20)   /* Interrupt vector register Slave mode */
    00083 #define  PCB_SP1BAUD      (PCB_BASE + 0x18)   /* Serial port 1 baud rate divisor register */
    00084 #define  PCB_SP1RD        (PCB_BASE + 0x16)   /* Serial port 1 receive register */
    00085 #define  PCB_SP1TD        (PCB_BASE + 0x14)   /* Serial port 1 transmit register */
    00086 #define  PCB_SP1STS       (PCB_BASE + 0x12)   /* Serial port 1 status register */
    00087 #define  PCB_SP1CT        (PCB_BASE + 0x10)   /* Serial port 1 control register */
    00088
    00089 // DMAxCON Register bits
    00090 //
    00091 #define  DCON_BW          0x0001              /* 0=Byte, 1=Word Select */
    00092 #define  DCON_ST          0x0002              /* 0=Stop, 1=Start DMA Channel */
    00093 #define  DCON_CHG         0x0004              /* Change Start Bit (see below) */
    00094 #define  DCON_EXT         0x0008              /* External Interrupt Enable */
    00095 #define  DCON_TDRQ        0x0010              /* Timer 2 Synchronization */
    00096 #define  DCON_P           0x0020              /* Relative Priority */
    00097 #define  DCON_SYN0        0x0040              /* Synchronization Type */
    00098 #define  DCON_SYN1        0x0080              /* - see below for constants */
    00099 #define  DCON_INT         0x0100              /* Interrupt */
    00100 #define  DCON_TC          0x0200              /* Terminal Count */
    00101 #define  DCON_SINC        0x0400              /* Source Increment */
    00102 #define  DCON_SDEC        0x0800              /* Source Decrement */
    00103 #define  DCON_SMIO        0x1000              /* Source Address Space Select */
    00104                                               /* 1=memory, 0=i/o space */
    00105 #define  DCON_DINC        0x2000              /* Destination Increment */
    00106 #define  DCON_DDEC        0x4000              /* Destination Decrement */
    00107 #define  DCON_DMIO        0x8000              /* Destination Address Space Select */
    00108                                               /* 1=memory, 0=i/o space */
    00109 #define  DCON_UNSYNC      0
    00110 #define  DCON_SSYNC       DCON_SYN0
    00111 #define  DCON_DSYNC       DCON_SYN1
    00112
    00113 #define  DCON_START       (DCON_CHG | DCON_ST)
    00114 #define  DCON_STOP        (DCON_CHG)
    00115
    00116 // TxCON Register bits
    00117 #define  TCON_CONT        0x0001
    00118 #define  TCON_ALT         0x0002
    00119 #define  TCON_EXT         0x0004
    00120 #define  TCON_P           0x0008
    00121 #define  TCON_RTG         0x0010
    00122 #define  TCON_MC          0x0020
    00123 #define  TCON_RIU         0x1000
    00124 #define  TCON_INT         0x2000
    00125 #define  TCON_INH         0x4000
    00126 #define  TCON_EN          0x8000
    00127
    00128 #define  TCON_START       (TCON_INH | TCON_EN)
    00129 #define  TCON_STOP        (TCON_INH)
    00130
    00131
    00132 typedef struct {
    00133   unsigned  srcl, srch;
    00134   unsigned  dstl, dsth;
    00135   unsigned  tc,   con;
    00136 } DmaRegs;
    00137
    00138
    00139 typedef struct {
    00140   unsigned  length;     // length of transfer (in bytes/words)
    00141   int       control;    // DxCON register bits
    00142   union {
    00143     void far *srcMem;   // source memory address
    00144     unsigned  srcPort;  // source i/o port
    00145   };
    00146   union {
    00147     void far  *dstMem;  // destination memory address
    00148     unsigned  dstPort;  // destination i/o port
    00149   };
    00150 } DmaInfo;
    00151
    00152
    00157 static const unsigned long AMD_PIOMASK[14] = {
    00158   0x00002000L, 0x00001000L, 0x00000004L, 0x00000008L,
    00159   0x00020000L, 0x00080000L, 0x00040000L, 0x00800000L,
    00160   0x00400000L, 0x00200000L, 0x00100000L, 0x08000000L,
    00161   0x10000000L, 0x00000400L
    00162 };
    00163
    00164 static const unsigned int  AMD_PIOPIN[14] = {
    00165   13, 12,  2,  3,
    00166   17, 19, 18, 23,
    00167   22, 21, 20, 27,
    00168   28, 10
    00169 };
    00170
    00185 inline unsigned long AMD_GetPioData() {
    00186   return ((unsigned long)inpw(PCB_PDATA0) <<  0) |
    00187          ((unsigned long)inpw(PCB_PDATA1) << 16);
    00188 }
    00189
    00190 inline unsigned long AMD_GetPioDir() {
    00191   return ((unsigned long)inpw(PCB_PDIR0) <<  0) |
    00192          ((unsigned long)inpw(PCB_PDIR1) << 16);
    00193 }
    00194
    00195 inline unsigned long AMD_GetPioMode() {
    00196   return ((unsigned long)inpw(PCB_PIOMODE0) <<  0) |
    00197          ((unsigned long)inpw(PCB_PIOMODE1) << 16) ;
    00198 }
    00199
    00200
    00201 inline void AMD_PioHigh(const int pio) {
    00202   if (pio<=15)
    00203     outpw(PCB_PDATA0, inpw(PCB_PDATA0) | (1<<pio));
    00204   else
    00205     outpw(PCB_PDATA1, inpw(PCB_PDATA1) | (1<<(pio-16)));
    00206 }
    00207
    00208
    00209 inline void AMD_PioLow(const int pio) {
    00210   if (pio<=15)
    00211     outpw(PCB_PDATA0, inpw(PCB_PDATA0) & ~(1<<pio));
    00212   else
    00213     outpw(PCB_PDATA1, inpw(PCB_PDATA1) & ~(1<<(pio-16)));
    00214 }
    00215
    00216
    00217 inline int AMD_GetPio(const int pio) {
    00218   if (pio<=15)
    00219     return inpw(PCB_PDATA0) & (1<<pio);
    00220   else
    00221     return inpw(PCB_PDATA1) & (1<<(pio-16));
    00222 }
    00223
    00224 extern void AMD_TestPios();
    00225 extern void AMD_SetPioData(unsigned long mask, unsigned long data);
    00226 extern void AMD_SetPioDir (unsigned long mask, unsigned long dir );
    00227 extern void AMD_SetPioMode(unsigned long mask, unsigned long mode);
    00228 extern void AMD_SetPcsWaitStates(int waitstates);
    00229 extern void AMD_StartDma(int channel, DmaInfo *dma);
    00230 extern void AMD_StopDma(int channel);
    00231 extern void AMD_GetDmaInfo(int channel, DmaInfo *dma);
    00232 extern void AMD_EnableDrq(int channel, int onoff);
    00233
    00234 extern void REP_INSB (int port, void *dest, int numBytes);
    00235 extern void REP_INSW (int port, void *dest, int numWords);
    00236 extern void REP_OUTSB(int port, void *src , int numBytes);
    00237 extern void REP_OUTSW(int port, void *src , int numWords);
    00238 extern void usleep(unsigned us);
    00239
    00240 #endif